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| Philips Semiconductors Product specification Silicon Diffused Power Transistor BUT12XI GENERAL DESCRIPTION Improved high-voltage, high-speed glass-passivated npn power transistor in a plastic full-pack envelope specially suited for overhead/high frequency lighting ballast applications and converters, inverters, switching regulators, motor control systems, etc. QUICK REFERENCE DATA SYMBOL VCESM VCEO IC ICM Ptot VCEsat ICsat tf PARAMETER Collector-emitter voltage peak value Collector-emitter voltage (open base) Collector current (DC) Collector current peak value Total power dissipation Collector-emitter saturation voltage Collector saturation current Inductive fall time CONDITIONS VBE = 0 V TYP. 5 MAX. 1000 450 8 20 33 1.5 300 UNIT V V A A W V A ns Ths 25 C IC = 5.0 A;IB = 0.86 A ICon = 5.0A;IBon = 1.0A,Tj 100C PINNING - SOT186A PIN 1 2 3 base collector emitter DESCRIPTION PIN CONFIGURATION case SYMBOL c b 123 case isolated e LIMITING VALUES Limiting values in accordance with the Absolute Maximum Rating System (IEC 134) SYMBOL VCESM VCEO IC ICM IB IBM Ptot Tstg Tj PARAMETER Collector-emitter voltage peak value Collector-emitter voltage (open base) Collector current (DC) Collector current peak value Base current (DC) Base current peak value Total power dissipation Storage temperature Junction temperature CONDITIONS VBE = 0 V MIN. -65 MAX. 1000 450 8 20 4 6 33 150 150 UNIT V V A A A A W C C Ths 25 C THERMAL RESISTANCES SYMBOL Rth j-hs Rth j-a PARAMETER Junction to heatsink Junction to ambient CONDITIONS with heatsink compound in free air TYP. 55 MAX. 3.65 UNIT K/W K/W June 1997 1 Rev 1.000 Philips Semiconductors Product specification Silicon Diffused Power Transistor BUT12XI ISOLATION LIMITING VALUE & CHARACTERISTIC Ths = 25 C unless otherwise specified SYMBOL Visol PARAMETER R.M.S. isolation voltage from all three terminals to external heatsink CONDITIONS f = 50-60 Hz; sinusoidal waveform; R.H. 65% ; clean and dustfree MIN. TYP. MAX. 2500 UNIT V Cisol Capacitance from T2 to external f = 1 MHz heatsink - 10 - pF STATIC CHARACTERISTICS Ths = 25 C unless otherwise specified SYMBOL ICES ICES IEBO VCEOsust VCEsat VBEsat hFE hFE hFEsat PARAMETER Collector cut-off current 1 CONDITIONS MIN. 450 10 14 5.8 TYP. 18 20 10 MAX. 1.0 3.0 10 1.5 1.3 35 35 12.5 UNIT mA mA mA V V V VBE = 0 V; VCE = VCESMmax VBE = 0 V; VCE = VCESMmax; Tj = 125 C Emitter cut-off current VEB = 9 V; IC = 0 A Collector-emitter sustaining voltage IB = 0 A; IC = 100 mA; L = 25 mH Collector-emitter saturation voltages IC = 5 A; IB = 0.86 A Base-emitter saturation voltage IC = 5 A; IB = 0.86 A DC current gain IC = 10 mA; VCE = 5 V IC = 1 A; VCE = 5 V IC = 5 A; VCE = 1.5 V DYNAMIC CHARACTERISTICS Ths = 25 C unless otherwise specified SYMBOL ton ts tf PARAMETER Switching times (resistive load) Turn-on time Turn-off storage time Turn-off fall time Switching times (inductive load) ts tf Turn-off storage time Turn-off fall time CONDITIONS ICon = 5.0 A; IBon = -IBoff = 1.0 A TYP. MAX. 1.0 4.0 0.8 UNIT s s s s ns ICon = 5.0 A; IBon = 1.0 A; LB = 1 H; -VBB = 5 V; Tj = 100 C 1.9 150 2.5 300 1 Measured with half sine-wave voltage (curve tracer). June 1997 2 Rev 1.000 Philips Semiconductors Product specification Silicon Diffused Power Transistor BUT12XI + 50v 100-200R IC 90 % ICon 90 % 10 % Horizontal Oscilloscope Vertical 300R 30-60 Hz 6V 1R IB ts ton toff IBon 10 % tr 30ns -IBoff tf Fig.1. Test circuit for VCEOsust. Fig.4. Switching times waveforms with resistive load. IC / mA VCC 250 200 LC IBon 100 LB T.U.T. -VBB 0 VCE / V min VCEOsust Fig.2. Oscilloscope display for VCEOsust. Fig.5. Test circuit inductive load. VCC = 300 V; -VBE = 5 V;LB = 1 uH VCC ICon 90 % IC RL VIM 0 tp IB RB T.U.T. ts toff IBon 10 % tf t T -IBoff t Fig.3. Test circuit resistive load. VIM = -6 to +8 V VCC = 250 V; tp = 20 s; = tp / T = 0.01. RB and RL calculated from ICon and IBon requirements. Fig.6. Switching times waveforms with inductive load. June 1997 3 Rev 1.000 Philips Semiconductors Product specification Silicon Diffused Power Transistor BUT12XI VCC VCEsat / V 1 0.9 0.8 0.7 IC/IB= 12 10 8 5 LC 0.6 0.5 IBend VCL LB T.U.T. CFB 0.4 0.3 0.2 0.1 0 0.1 1 IC / A 10 Tj = 25 C Tj = 125 C -VBB Fig.7. Test circuit RBSOA. VCC = 150 V; -VBB = 5 V LC = 200 H; VCL 850 V; LB = 1 H PD% Normalised Power Derating Fig.10. Typical collector-emitter saturation voltage. VCEsat = f(IC); parameter IC/IB VBEsat / V 1.2 1.1 1 0.9 0.8 0.7 0.6 IC = 6A 3A 2A Tj = 25 C Tj = 125 C 120 110 100 90 80 70 60 50 40 30 20 10 0 0 20 40 60 80 100 Tmb / C 120 140 0 0.4 0.8 1.2 IB / A 1.6 2 2.4 Fig.8. Normalised power dissipation. PD% = 100PD/PD 25C = f (Tmb) VBEsat / V 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 0.4 0.1 1 IC / A IC/IB= 8 10 12 10 Tj = 25 C Tj = 125 C Fig.11. Typical base-emitter saturation voltage. VBEsat = f(IB); parameter IC VCEsat / V 10 Tj = 25 C Tj = 125 C 6A 1 4A IC=2A 0.1 0.1 1 IB / A 10 Fig.9. Typical base-emitter saturation voltage. VBEsat = f(IC); parameter IC/IB Fig.12. Typical collector-emitter saturation voltage. VCEsat = f(IB); parameter IC June 1997 4 Rev 1.000 Philips Semiconductors Product specification Silicon Diffused Power Transistor BUT12XI IC / A 100 h FE 100 5V ICMmax 10 1V 10 Tj = 25 C Tj = 125 C ICmax II 1 0.01 1 0.1 IC / A 1 10 Fig.14. Typical DC current gain. hFE = f(IC) parameter VCE I 0.1 DC IC / A 8 7 6 5 0.01 1 10 100 1000 VCE / V 4 3 2 1 0 0 200 400 600 800 1000 Fig.13. Forward bias safe operating area. Tmb = 25C I II NB: Region of permissible DC operation. Extension for repetitive pulse operation. Mounted with heatsink compound and 30 5 newton force on the centre of the envelope. VCE / V Fig.15. Reverse bias safe operating area. Tj Tj max 1E+01 Zth / (K/W) BUX100 1.0 0.5 1E+00 0.2 0.1 0.05 1E-01 0.02 P D tp D= tp T t D=0 1E-02 1E-05 1E-03 t/s T 1E-01 1E+01 Fig.16. Transient thermal impedance. Zth j-mb = f(t); parameter D= tp/T June 1997 5 Rev 1.000 Philips Semiconductors Product specification Silicon Diffused Power Transistor BUT12XI MECHANICAL DATA Dimensions in mm Net Mass: 2 g 10.3 max 3.2 3.0 4.6 max 2.9 max Recesses (2x) 2.5 0.8 max. depth 2.8 6.4 15.8 19 max. max. seating plane 15.8 max 3 max. not tinned 3 2.5 13.5 min. 1 0.4 M 2 3 1.0 (2x) 0.6 2.54 0.5 2.5 1.3 0.9 0.7 5.08 Fig.17. SOT186A; The seating plane is electrically isolated from all terminals. Notes 1. Refer to mounting instructions for F-pack envelopes. 2. Epoxy meets UL94 V0 at 1/8". June 1997 6 Rev 1.000 Philips Semiconductors Product specification Silicon Diffused Power Transistor BUT12XI DEFINITIONS Data sheet status Objective specification Product specification Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. (c) Philips Electronics N.V. 1997 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. This data sheet contains target or goal specifications for product development. This data sheet contains final product specifications. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. June 1997 7 Rev 1.000 |
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